The present invention relates to a technology that contributes to the achievement of high definition of an image display apparatus, particularly a liquid crystal display apparatus.
A high resolution of a display that showed a slow progress in a CRT display has been achieved with an introduction of a new technology including a liquid crystal. Namely, high-definition imaging in a liquid crystal display apparatus can be achieved relatively easily by microprocessing, compared to that in a CRT display.
As the liquid crystal display apparatus, an active matrix type liquid crystal display apparatus using a thin film transistor (hereinafter referred to as a TFT) as a switching element has been known. The active matrix type liquid crystal display apparatus has a structure that scanning lines and signal lines are arrayed on a TFT array substrate in a matrix fashion, a TFT is arranged in each intersection point of the scanning lines and the signal lines on the TFT array substrate, and a liquid crystal material is sealed between the TFT array substrate and an opposite substrate disposed with a predetermined space therebetween. The liquid crystal display apparatus controls a voltage applied to the liquid crystal material by the use of the TFT, thus making it possible to display an image by utilizing an electro-optic effect of liquid crystal.
FIG. 27 shows an equivalent circuit diagram of the TFT array substrate. As shown in FIG. 27, the signal lines 30 and the scanning lines 40 are arrayed in a matrix fashion, and an area surrounded by each signal line 30 and each scanning line 40 forms a unit pixel. The unit pixel comprises a pixel electrode 20 and a TFT 10 connected thereto.
The following problems are posed as the number of the pixels increases with an advanced definition of the active matrix type liquid crystal display apparatus. Specifically, with the increase in the number of the pixels, the number of the signal lines and the scanning lines becomes larger, and the number of driver ICs becomes vast, resulting in an increase of cost. Furthermore, an electrode pitch between signal lines on an array substrate for connecting a driver IC thereto becomes small, so that a connection of the driver IC to the signal line is difficult and a yield of a connection operation is lowered.
To solve such a problem, many proposals have been made in which the number of the driver ICs required is reduced and a pitch of connection terminals is made large by time-divisionally applying a potential from one signal line to two pixels which are adjacent to each other. For example, these proposals are disclosed in Japanese Patent Laid-Open Gazettes No. 138851/1994, No. 148680/1994, No. 2837/1 999, No. 265045/1993, No. 188395/1993 and No. 303114/1993.
Among these gazettes, in Japanese Patent Laid-Open Gazette No. 138851/1 994, disclosed is a structure in which a multiplexer circuit is provided outside a pixel matrix, and a potential is supplied from one data driver output to a plurality of signal lines.
In Japanese Patent Laid-Open Gazette No. 148680/1994, the following proposal is made. Specifically, in a matrix panel composed of pixels in N rows and M columns, drain electrodes of t TFTs (t: any integer) adjacent to each other for each row and each column are connected together to be formed by one signal line, and t signal lines are formed for each row so that each of the TFTs connected collectively can be controlled independently.
In Japanese Patent Laid-Open Gazette No. 2837/1999, the following proposal is made. Specifically, two scanning lines are provided so as to be allocated to one row of pixels, and one signal line is provided so as to be allocated to two columns of pixels. A common line connected to a common electrode is provided. A pixel array is arranged, which has a first group of pixels driven via a TFT selected by one of the two scanning lines and a second group of pixels driven via a TFT selected by the other scanning line, and the first and second groups of pixels share a part of the common electrode.
However, according to the proposal of Japanese Patent Laid-Open Gazette No. 138851/1994, there is a problem that since TFTs used for the multiplexer circuit allow respective liquid crystal capacitors of the signal lines to store charges therein within a predetermined time as short as several microseconds to several tens of microseconds, the multiplexer circuit becomes enormous, resulting in a decrease in a manufacturing yield. According to the proposals of Japanese Patent Laid-Open gazettes No. 148680/1994 and No. 2837/1999, there is a problem that though the enormous multiplxer circuit is unnecessary, the number of the gate driver outputs and the number of the scanning lines are doubled.
Contrary to these proposals, the proposals disclosed in Japanese Patent Laid-Open Gazette No. 265045/1993, No. 188395/1993 and No. 303114/1993 do not have the above-described problems. One of the proposals disclosed in Japanese Patent Laid-Open Gazette No. 265045/1993 is shown in FIG. 28. A structure that two pixels are connected to one signal line via TFTs P1 to P3 is disclosed. Accordingly, since the number of the signal lines may be a half of the conventional one, the number of the outputs of the data driver can be made to be a half of the conventional one. However, information notifying that this technology has been put to practical use is not obtained until now.